SK Inner Detector Trigger

SuperK Inner Detector Trigger Block Diagrams

CENTER HUT ACCEPT (*)
CENTER HUT TRIGGER (*)
HUT 1 TRIGGER (*)
HUT 1 HITSUM (*)
HUT 2 HITSUM (*)
HUT 3 HITSUM (*)
HUT 4 HITSUM (*)
Specifications for VME-TRG [M.Shiozawa 11/22/93] (**)
20-input linear sum [ICRR 12/92]: hitsum module for the ATMs [3486 x 2478 pixels]
"Split" Trigger:
- raw diagram of original "split" trigger setup [for supernova and SLE tests, 2/11/97].
  This scheme was later implemented for start of regular SLE runs May 1997. Later in the summer, a gate was added to the coincidence module input to avoid false trigger signals at the OD-DAQ from overlapping LE/SLE pulses with HE/OD triggers.
- diagram and delay measurements of current "split" trigger setup (29 May 1998).

(*)
= scanned from May 20 1996 drawings by M.Shiozawa

(**)
= scanned from postscript file

Miscellany

Graph of trigger rate vs threshold mV for LE trigger [postscript file; 1/28/97].

Here is a photo of the trigger electronics racks in the center hut. The blue-colored NIM crates contain the linear and logic units (e.g. discriminators, fan-in / out modules, etc.) for the trigger logic. Here, the trigger levels (OD trigger, High E, Low E, Super-low E, etc.) are defined depending on the coincidences of the hitsum signals coming from the outer electronics huts. Shown on the left handside is a VME crate with the "VME-TRG" module which generates and records event numbers at each occurence of a trigger signal. On the right upper corner, the EVENT COUNT DRIVER box is shown where the event number data is distributed to the outer huts and to the OD-DAQ electronics.

Trigger Electronics racks in center hut