Why and How of Lower Energy Trigger in SK and how it affects the oddaq and what we can do about it.

Ken Young.
17 January, 1997

Our goal is to have a physics threshold of 5 MeV in our solar neutrino energy spectrum measurement. To reach this, we must be able to trigger at or above 200 Hz. The ID is capable of this. The OD is not.

There is still an uncertainty as to what the trigger rate must be in order to achieve the 5 MeV threshold. Studies are underway to determine this and the immediate goal is to trigger at 200 Hz.

The OD is capable of 75 Hz rates at this time. With the present logic, the limitation is in the VME bus loading. We have modified some hardware and when this is implemented, the maximum rate will be doubled to 150 Hz. [Please see discussion of BIP trigger below.] At this moment, we DO NOT have code that is capable of doing this.

SPLIT TRIGGER.

An alternative method of achieving >200 Hz triggers for LE triggers is to ONLY trigger the ID for LE events. The OD would be triggered for HE or OD triggers. This is called the SPLIT TRIGGER. The OD would be triggered at approximately 10 Hz in this configuration.

The OD cannot robustly handle split triggers at this time. The December trial of the split trigger code found an unacceptable mismatch rate of about 0.001 between the Struck latch event number and the tdc event number. We don't know the cause of the mismatch at this time but it is larger than the mismatch rate of E-5 measured for synchronous triggers.

We have hypothesese on why the mismatch occurs and are studying them. One weakness is tha the Struck Latch ONLY latches the t0 trigger in a burst of events within the 16 microsecond TDC pipeline. It is INCAPABLE OF TAGGING EACH event in the pipeline. This was OK as long as the events were consecutively numbered. However, split trigger means that the pipelined events are likely to be separated by many events. We are tagging each event in the pipeline by using the 4 lower bits of the event number which are latched in the TDC. This should be enough to uniquely identify the events. [Please note that there is a veto of 800 ns between TRGs. This means that the maximum number of triggers that can occur in the 6 micro sec after the t0 is 6000/800 = 7.5. The 10 microsec before t0 is governed by a veto which only occasionally allows events to leak in.]

The Struck latch has yet other limitations. In order for the Struck latch to record the first event in the pipeline and also not be confused by bursts of triggers, the input is governed by a logic veto in the central hut which is an extra logical unit with its own crevices where events within a burst may sneak in. Intrinsic to the Struck latch we know that the buffering structure and busy signals are VERY different from the TDCs. In low regular rates, the synchronicity of the Struck Latch and TDCs is very good. At higher instantaneous rates, we have noticed anamolous events occuring at measureable levels. At the expected higher rates, this may be worse. We have not implemented the Struck latch bip into our vetos. This may be important in the future. [To implement the struck latch bip, we must make modifications to the FB bip logic board.]

BIP Trigger and how it's used to measure the dead time of the oddaq.

The 3 V533 modules in the central hut is used to measure the UTC of the event as well as to measure the length of the BIP [Buffering In Progress] of the TDCs. When BIP is true, the TDC is incapable of accepting any more events. The BIP is true for several micro seconds after a pipeline worth of triggers. At the moment, we are triggering the V533s two times in each event. The first is at the TRG time. The second is at the trailing edge of the BIP pulse [BIP-end]. This records the beginning and end of the daq cycle for one pipeline of data. The two triggers of both V533s require 2 readout cycles. Since the V533 readout cycle is the limniting factor of our maximum data rate, we can increase our maximum rate by reading the V533's only ONCE during an event. By separating the TRG trigger info on 2- V533 and the BIP-end on the third V533, we would have two triggers on separate V533s and ONLY ONE read cycle for the 3 V533's . We have implemented the hardware for this but the code for doing this is not yet functional.

Since the V533's, when used alone with a fast cpu, can record data in excess of 1 KHz, the obvious way to reach higher rates is to have a separate VME crate and CPU for the V533. The data from the dedicated CPU can be socketed to SUKANT for integration. At 1 KHz of triggers, the required data rate is 288 Kb/sec which is well within the ethernet capability.

SUMMARY.

With a functional and robust split trigger, we should be able to reach the immediate goal of having 200 Hz LE trigger with the OD being triggered only at 10 Hz. The most straight forward way of achieving robust data with a high degree of integrity, we should have a TDC in each hut that will record all 16 bits of the event number and not depend on the Struck latch.

If we want the OD daq to be able to robustly record above 150 Hz, we should produce a dedicated cpu/crate to readout the V533's.

With the upgrade using 16 bits to record the event number in the TDC and the dedicated cpu/crate, we will be capable of handling 1 KHz rates in the ODDAQ and also of handling the SPLIT TRIGGER to meet the situations that are likely to arise in SK.


Ken Young                                Tel: 206 543 4186
Dept of Physics Box 351560               FAX: 206 685 9242
University of Washington                 Email:  young@phys.washington.edu
Seattle, WA 98195-1560                http://www.phys.washington.edu/~young/