Event Number Translator (ENT) Board

OD DAQ Version 2

Overview of this document

• Functions
• Inputs and Outputs
• Jumpers, Switches and Trimpots
• LEDs and their Functions
• Schematics and PCB Layout
• Performance Test Results
• Revision Notes

Note: This site is best viewed with Netscape Ver.2 or compatible !

• 16-bit receiver of the EVENT COUNT DRIVER data.
• 16-bit level translator for the V533 Fifo (slot 8) data input.
• Fan-in/out for the Global Trigger pulses with 4 NIM output drivers.
• Manual and remote Test Trigger logic with variable global trigger veto window.

Block diagram (also as postscript available):

Inputs and Outputs
Name	I/O	Level	Where	Function
TRG	input	NIM	LEMO	Global trigger from the VME TRG system in the center hut.
TRG fanout	outputs	NIM	4 LEMOs	4 fan outputs of the global trigger for distributing to the rest of the OD DAQ.
Test TRG	input	TTL	LEMO	Low-active input for an external trigger pulser or for the remote test trigger signal from the outer huts (via the FCM board).
Event No. Input	inputs	d-ECL	40-pin header	16-bit event number and 17th bit for additional trigger information from the EVENT COUNT DRIVER module in the center hut. pin 1/2 pin 3/4 pin 5/6 : pin 33/34 pin 35/36 pins 37...40 = not used = +/- event number bit 0 = +/- event number bit 1 : = +/- event number bit 15 = +/- global trigger (alternative) = not used
Event No. Output	outputs	RS485	34-pin header	16-bit translated event number for the Fifo V533 module(s). pin 1/2 pin 3/4 : pin 31/32 pin 33/34 = +/- event number output bit 0 = +/- event number output bit 1 : = +/- event number output bit 15 = +/- global trigger flag

Jumpers, Switches and Trimpots

JP1:

Select the Trigger Source by setting a jumper to either of the following pin pairs:
pins 1/2: Via NIM input connector [DEFAULT]
pins 2/3: Via the 17th pair of the event number cable from the EVENT COUNT DRIVER (ECL input).

S1:

Manual Test Trigger pushbutton. Once pushed, a veto window (variable 15...400 msec) is activated, blocking Global Triggers and instead sending a single trigger pulse after 1 msec delay to the fan outputs.

R68:

Trimpot to adjust the test trigger veto window between 15 and 400 msec. [DEFAULT = 100 msec].

LEDs and their functions From top to bottom: Global Trigger (green): Sits next to the Global Trigger input connector. It should flash briefly for each new trigger pulse. If it doesn't flash, please check if the Lemo cable is correctly hooked up or if the 51 Ohm termination resistor sits in the R36 socket. External Test Trigger (yellow): Sits next to the Test TRG Input connector. It'll flash whenever a test trigger pulse has been generated externally - e.g. by pushing the Test TRG button at one of the Fastbus Interface modules in the outer huts. Event Number Status Bits (yellow): One LED for each of the 16 event number bits, positioned next to the header connectors. Manual Test Trigger (orange): Sits next to the Manual Test Trigger pushbutton. It'll flash each time the pushbutton is activated. The button itself can only be reached with a pointy object such as a small screw driver, etc. This is for safety reasons, because: Note: NO test trigger should be generated during a normal run!!

The 2-layer PCB layout was edited with TANGO PCB V2, also on a 486 PC. Here's the gif or postscript file of the silk print layer.

• 06/21/96 - Version 2.0: ENT design finalized for etching.

• 07/12/96 - Version 2.1: Add socket pins for removable 50 Ohm NIM terminator resistor on R36 (TRG input).

rev. HGB 01/27/97. Any comments to berns@phys.washington.edu are welcome!