In this chapter the electronics in Super-Kamiokande is described in detail. The electronics for the inner detector consists of TKO (TRISTAN/KEK Online) modules and VME modules. The logic diagram of the electronics system is shown in Fig 1. These are arranged in 4 separate electronics huts, each with 12 TKO system crates and 2 VME crates, for a total of 48 and 8 crates, respectively.

The front-end electronics uses 934 modules called ATM (Analog Timing Module) which process the signals from the PMTs. In general 20 ATM modules are arranged in an each TKO crate. Each crate also contains one interface module called SCH (Super Control Header), one trigger signal distribution module called GONG (GO/NoGo), and one summing circuit. In the VME crates, there are 6 data buffer modules called SMP (Super Memory Partner) and one SBus-VME Interface.

Fig 2 shows the block diagram of the circuit in the ATM. First, each ATM handles 12 PMT channels, and a signal from each PMT is divided into four. One of these four, after amplification by a factor of 100, goes through a discriminator the threshold of which is set to 100mV, equivalent to about 0.32 p.e.. When the pulse height of a PMT signal exceeds this threshold,a rectangular pulse (200nsec in width and 11 mV in height) is generated. The pulses from each 12 PMT channels are summed and output as the HITSUM signal. A rectangular pulse with 900nsec duration is generated as a HIT signal simultaneously. For this 900nsec, any subsequent PMT signal is rejected. This discriminator pulse starts the charging of TAC (time-to-analog converter), and it will end when the global trigger signal arrives. Another signal from the PMT is sent to the QAC (charge-to-analog converter) which accumulates charge for 400nsec after each discriminator hit. If the global trigger does not arrive within 1.3 micro-sec after the PMT hit, the TAC/QAC are flushed. While the global trigger arrives, an ADC begins digitizing the voltages stored in the TAC/QAC capacitors. The ADC outputs are stored in the 1024 word FIFO (first-in first-out) memory with event number. It spends 5.5micro-sec to do Analog-Digital conversion and store into memory, and the signal is not processed in this period. Therefore, the TAC/QAC has 2 channels, so that if the one is not available, the other channel can be used instead. This reduces the dead time, which is especially useful for observation of the decay electron signal from stopping muons. The timing chart of signals in the ATM is shown in Fig 3.

Pedestals for ATMs are measured every 30 minutes. This takes about 1 minute. In order to reduce dead time for our super nova search, pedestal data taking is done for 1/8 of all the ATM, and normal data taking is operated to the remaining ATM. For solar neutrino analysis, data taking is dead during all pedestal measurements.

The trigger condition was already described. The trigger signal is fed to the TRG module. This module has a 16 bit event counter, and an internal clock which runs at 50 MHz, so the relative time of the event is determined with 20nsec resolution. This event information is stored in the FIFO memory of the TRG module. The global trigger signal and event counter is distributed to 48 GONG modules in each TKO crate. GONG modules distribute the trigger signal and event counter to the ATM modules. The timing chart of the trigger is also shown in Fig 3.

Data acquisition system and Offline computer facilities

The 20 ATM data are read out via SCH to the SMP (VME module), and stored in it. The data stored in SMP are sent via SBus-VME Interface to the online computer. In each electronics hut, there are two Sun SPARClassic (S4/CL) for inner data acquisition (total 8), and each S4/CL reads out and collects the data of 6 SMP modules. This is shown in Fig 1. These data are transferred to a Sun SPARCstation 10 (S4/10) as a online host computer via FDDI which is a network for transferring data at very high speed. After the data format is changed in the reformat machine (S4/CL, described below), they are sent to the offline computer which is outside of the mine via an optical fiber cable.

In the online host computer (S4/10), all the information of hit PMTs including inner and outer detector belonging to one global trigger is concatenated and recorded. This is regarded as one event. Next, the format of this data is changed to ZEBRA format, by what we call the ``reformat'' process. ZEBRA is a tool for data management which is developed in CERN which we use because it is convenient for storage and handling of large quantities of data, and it is also standard in high-energy physics experiment. After reformat, the ZEBRA format data is sent to offline host computer (VPX210/10S) every ten minutes. The size of this file corresponding to ten minutes is about 70MByte. This host computer saves all the data in a tape library and converts the data of ADC and TDC counts to units of photo electron and nano second, respectively. These data are stored in buffers on 1GByte memory temporarily, and distribute to SPARCstation 20 (S4/20), with a total of 20 CPUs connected by the network called UltraNet1000. In these machines, all events are reconstructed by various algorithms for different energy ranges. There are also 10 work stations for analysis (S4/10) with 2 CPU in each machine, connected via FDDI to VPX210/10S and S4/20.

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Figure 1: The logic diagram of the electronics system used in Super-Kamiokande.


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Figure 2: The ATM block diagram.


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Figure 3: The timing chart for signal and trigger.


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